美国芯源系统有限公司（MPS）是世界领先生产模拟线性电源集成电路的制造商之一。作为（美国）全国证劵交易商自动报价系统协会(NASDAQ)上市半导体公司的一员，MPS 的总部设在美国硅谷的中心位置。先进的技术，尖端的产品使MPS成为世界上发展最快的技术公司之一。MPS的产品品质高、成本低、无生产线，是IC模拟电源的半导体制造商。本公司设计、研发、制造、销售自身产品，但与其他同行业不同的是，MPS尤其以高效能的模拟电路产品见长。运用专有的技术，结合IC工艺上的经验，MPS以更低的成本为顾客提供更高性能、更卓越、更可靠的产品。

1. Senior Analog IC Design Engineer Positions:
Design analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS technologies. Demonstrate ability to successfully bring products to market. Plan and direct the work of a group of junior design engineers. Work on product definition, circuit synthesis from the transistor/resistor level up to the system level, simulation, layout supervision.

Qualifications:
BSEE / MSEE with 3 + years exp in Analog circuit design.
Work Location: Chengdu & Hangzhou

2. Entry Level Analog IC Design Engineer Positions:
Design analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS technologies. Develop state of the art products that include the following circuit types: op amps, comparators, interface circuits, voltage references, ADCs, DACs, delay elements, DC-DC converters, and power supply control algorithms. Products to be designed include charge pumps, switching regulators, linear regulators, display drivers, and power management ICs for fast-growing portable and non-portable markets such as broadband modems, PDAs, notebooks, cell phones, telecom, fiber optics, digital camera, and network equipment.
Qualifications:
MSEE focusing on circuit design. Have taken major circuit design and device physics courses. Have some knowledge about power electronics.

Work Location: Chengdu & Hangzhou

3．Layout Designer
Layout Designer is to do layout job in Analog and Mixed-Signal Circuit Design. The followings are the requirements for this job function.
Requirements:
① Do Layout according to Design Rules;
② Do Layout according to the Schematics in a timing manner;
③ Follow Design Engineer’s instructions to build the block level Layout based on device matching and sizes requirements;
④ Top Level connections;
⑤ Database DRC & LVS verifications on either DIVA or Dracula basis;
⑥ Chip Tapeout in accordance with company Tapeout Procedure;
⑦ Positive Attitude.

Qualifications:
① 3 to 5 years Layout experience in Analog and Mixed Signal Design;
② Cadence and ICED tools experiences are preferable.
Work Location: Chengdu

4. Sr. Layout Designer
Sr. Layout Designer is to do layout job professionally and independently for Analog and Mixed-Signal Circuit Design. The followings are the requirements for this job function.
Requirements:
① Chip Planning;
② Project Schedule Estimation;
③ Device Placement on block level according to matching requirements;
④ Block implementations on Top Level;
⑤ Top Level connections;
⑥ Database DRC & LVS verifications on either DIVA or Dracula basis;
⑦ Chip Tapeout in accordance with company’s Tapeout Procedure;
⑧ Helping on the training for Jr. Layout Designers;
⑨ Positive Attitude.

Qualifications:
① More than 7 years Layout experience in Analog and Mixed-Signal Circuit Design;
② Be able to resolve LVS issues independently;
③ Familiar with fundamental of Analog Processes;
④ Cadence and ICED tools experiences are preferable.

Work Location: Chengdu

5. IC Layout Engineer
Responsibilities include layout of analog/mixed signal IC, DRC/LVS verification, block/chip floor plan, power/clock distribution and chip assembly.
Requirements:
1. At least 3 years IC layout design experience, BSEE preferred;
2. Cadence layout design tools;
3. DRC/LVS tools;
4. Bipolar and CMOS process;
5. Good communication skill in English and Chinese;
6. Both Chinese and English resumes are acceptable.

Work Location: Chengdu

PS: Both Chinese and English Resumes are acceptable.

邮箱地址：hr-cn@monolithicpower.com
传真号码：028—87303060